Second-order neural core for bioinspired focal-plane dynamic image processing in CMOS

Based on studies of the mammalian retina, a bioinspired model for mixed-signal array processing has been implemented on silicon. This model mimics the way in which images are processed at the front-end of natural visual pathways, by means of programmable complex spatio-temporal dynamic. When embedded into a focal-plane processing chip, such a model allows for online parallel filtering of the captured image; the outcome of such processing can be used to develop control feedback actions to adapt the response of photoreceptors to local image features. Beyond simple resistive grid filtering, it is possible to program other spatio-temporal processing operators into the model core, such as nonlinear and anisotropic diffusion, among others. This paper presents analog and mixed-signal very large-scale integration building blocks to implement this model, and illustrates their operation through experimental results taken from a prototype chip fabricated in a 0.5-μm CMOS technology.European Union IST 2001 38097Ministerio de Ciencia y Tecnología TIC 2003 09817 C02 01Office of Naval Research (USA) N00014021088

Robust symmetric multiplication for programmable analog VLSI array processing

This paper presents an electrically programmable analog multiplier. The circuit performs the multiplication between an input variable and an electrically selectable scaling factor. The multiplier is divided in several blocks: a linearized transconductor, binary weighted current mirrors and a differential to single-ended current adder. This paper shows the advantages introduced using a linearized OTA-based multiplier. The circuit presented renders higher linearity and symmetry in the output current than a previously reported single-transistor multiplier. Its inclusion in an array processor based on CNN allows for a more accurate implementation of the processing model and a more robust weight distribution scheme than those found in previous designs.Office of Naval Research (USA) N-00014- 02-1-0884Ministerio de Ciencia y Tecnología TIC2003-09817-C02-0

A Focal-Plane Image Processor for Low Power Adaptive Capture and Analysis of the Visual Stimulus

Portable applications of artificial vision are limited by the fact that conventional processing schemes fail to meet the specifications under a tight power budget. A bio-inspired approach, based in the goal-directed organization of sensory organs found in nature, has been employed to implement a focal-plane image processor for low power vision applications. The prototype contains a multi-layered CNN structure concurrent with 32times32 photosensors with locally programmable integration time for adaptive image capture with on-chip local and global adaptation mechanisms. A more robust and linear multiplier block has been employed to reduce irregular analog wave propagation ought to asymmetric synapses. The predicted computing power per power consumption, 142MOPS/mW, is orders of magnitude above what rendered by conventional architectures

On the development of a MODEM for data transmission and control of electrical household appliances using the low-voltage power-line

This paper presents a CMOS 0,6μm mixed-signal MODEM ASIC for data transmission on the low-voltage power line. The circuit includes all the analog circuitry needed for input interfacing and modulation/demodulation (PLL-based frequency synthesis, slave filter banks with PLL master VCO for tuning, decision circuitry, etc.) plus the logic circuitry needed for control purposes. The circuit operates correctly in the whole industrial temperature range, from -45 to 80°C, under 5% variations of the 3.3V supply voltage.Comisión Interministerial de Ciencia y Tecnología FD97-1611(TIC)Ministerio de Ciencia y Tecnología TIC200 1-092

CMOS mixed-signal MODEM for data transmission and control of electrical household appliances using the low-voltage power-line

This paper presents a CMOS 0.6μm mixed-signal MODEM ASIC for data transmission using the low-voltage power line. This circuit includes all the analog blocks needed for input interfacing and modulation/demodulation (PLL-based frequency synthesis, slave filter banks with PLL master VCO for tuning, and decision circuitry) plus the logic circuitry needed for control purposes. The circuit operates correctly within the industrial temperature range, from -45 to 80°C, under 5% variations of the 3.3V supply voltage.Comisión Interministerial de Ciencia y Tecnología 1FD97-1611(TIC)Ministerio de Ciencia y Tecnología TIC2001-092

Offset-compensated comparator with full-input range in 150nm FDSOI CMOS-3d technology

This paper addresses an offset-compensated comparator with full-input range in the 150nm FDSOI CMOS- 3D technology from MIT- Lincoln Laboratory. The comparator discussed here makes part of a vision system. Its architecture is that of a self-biased inverter with dynamic offset correction. At simulation level, the comparator can reach a resolution of 0.1mV in an area of approximately 220μm2 with a time response of less than 40ns and a static power dissipation of 1.125μW

3-Layer CNN Chip for Focal-Plane Complex Dynamics with Adaptive Image Capture

This paper presents a CMOS implementation of a layered CNN concurrent with 32times32 photosensors with locally programmable integration time for adaptive image capture. The network is arranged in two layers containing feedback and control templates, inter-layer connections and programmable ratio of time constants. There are also feedforward connections to a third layer, which is faster, and devoted exclusively for combining the outputs of the other two. A more robust and linear multiplier block has been employed to reduce irregular analog wave propagation ought to asymmetric synapses. Global and local adaptation circuits are included on-chip. The predicted computing power per power consumption, 240MOPS/mW, is amongst the largest reported, what renders this kind of devices as especially adequate for portable applications of artificial visionMinisterio de Ciencia y Tecnología TIC2003-09817-C02-01Office of Naval (USA) N-00014-02-1-088

A CNN-driven locally adaptive CMOS image sensor

A bioinspired model for mixed-signal array mimics the way in which images are processed in the visual pathway. Focal-plane processing of images permits local adaptation of photoreceptor structures in silicon. Beyond simple resistive grid filtering, nonlinear and anisotropic diffusion can be programmed in this CNN chip. This paper presents the local circuitry for sensors adaptation based on the mixed-signal VLSI parallel processing infrastructure in CMOS

Offset-compensated comparator with full-input range in 150nm FDSOI CMOS-3d technology

Trabajo presentado al LASCAS celebrado en Iguazu (Brasil) del 24 al 26 de febrero de 2010.This paper addresses an offset-compensated comparator with full-input range in the 150nm FDSOI CMOS-3D technology from MIT- Lincoln Laboratory. The comparator discussed here makes part of a vision system. Its architecture is that of a self-biased inverter with dynamic offset correction. At simulation level, the comparator can reach a resolution of 0.1mV in an area of approximately 220μm2 with a time response of less than 40ns and a static power dissipation of 1.125μW.Peer Reviewe

La capacitación a nivel de Máster de los educadores ambientales. La experiencia de un Máster Interuniversitario en Educación Ambiental

El Máster Interuniversitario en Educador/a Ambiental es un proyecto consolidado en el Sistema Universitario Español. Actualmente (curso 2014/2015) se desarrolla la 6ª edición del mismo. Durante estos últimos años se han capacitado como educadores ambientales con nivel de Máster más de 200 estudiantes. Muy brevemente, se puede decir que se trata del primer Máster oficial interuniversitario adaptado al Espacio Europeo de Educación Superior de estas características. Está coordinado actualmente por la Universidad de Málaga, y junto a ella co-organizan este Máster las Universidades de Córdoba, Cádiz, Granada, Almería, Pablo de Olavide de Sevilla y Huelva, participando además profesorado de todas las universidades andaluzas y de varias españolas. Es un proyecto pionero en el uso de TIC. Para su realización, este Máster se apoya a) en el uso de una plataforma virtual de apoyo (Moodle) para desarrollo de las clases teóricas y prácticas, y b) con una herramienta virtual para la teledocencia que permite conectar las diferentes sedes universitarias en directo (evitando numerosos desplazamientos), y que además, el profesorado y alumnado del máster participen simultáneamente en el desarrollo de las clases. En sus dos itinerarios, uno profesional, dirigido a formar a profesionales de la Educación Ambiental, y otro investigador (equivalente al periodo formativo de un doctorado) que forma investigadores en este ámbito de conocimiento interdisciplinar, ha dado fruto a un gran número de resultados tangibles: a) profesionales: emprendimiento en el sector con varios proyectos en marcha, cualificación de educadores que ya trabajaban en centros de educación ambiental,… b) de investigación: realización de tesis doctorales, publicación de monografías científicas y artículos en revistas, asistencia a congresos nacionales e internacionales. En una de las investigaciones publicadas en revistas (Ponce y Tójar, 2014), y de la que se informa en el contenido del póster, se analiza el grado de adquisición de competencias de educación ambiental adquiridas por los egresados, así como de las oportunidades de empleo de los mismos.Asociación Española de Educación Ambienta